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#1 |
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New Member
Join Date: Feb 2011
Location: India
Posts: 1
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Hello All,
I tried reading the E-EDID contents an HDMI compliant TV through FPGA. TV asserts the hot plug detect pin, but does not respond with its EDID data.(I have checked through my set up that TV does not even acknowledges when its addressed (A0h) through the I2C protocol). This is what i have done. 1. Check for hot plug detect pin status. 2. If hot plug detect pin is asserted,then read 128 bytes from segment zero. Other details I. The following is the data sequence used over the eddc channel: (START) (ddc addr, 60h) (dontcare about the response from tv) (segment pointer value) (dontcare about the response from tv) (START) (ddc addr, A0h) (ACK from TV) (WORD OFFSET) (ACK from TV) (START) (ddc addr, A1h) (ACK from TV) (EDID DATA1) (ACK from HDMI Source) (EDID DATA2) (ACK from HDMI Source) .......... (EDID DATA128) (No ACK from HDMI Source) (STOP) II. I2C Clock frequency used is 50K bits/sec, word offset = 0. III. In my set up, i have connected only the ddc lines (clock "scl", data "sda") and hot plug detect. Would greatly appreciate any help. Thanks, Shawn. |
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| Tags |
| 128, audio, byte, check, code, ddc, detect, eddc, edid, edit, hdmi, hot, offset, plug, problem, source, status |
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